1. Field of the Invention
The present invention relates to microminiature electronic circuitry surface mount technology (SMT) and particular to packaging integrated circuit devices including chips and modules utilizing a combination of controlled collapse electrical interconnections, such as solder balls, and pin through-hole conductors.
2. Description of Related Art
Solder electrical contacts, particularly for integrated circuits and VLSI technology (very large scale integration), has been widely used and implemented for more than two decades. As it has been perfected, it has made extensive use of what is known as solder ball connection (SBC) technology. Numerous techniques have been developed, such as the controlled chip collapse connection or C-4 technology within the IBM Corporation which has often been referred to in the industry as the flip-chip technique. The term flip-chip is used because it employed packaging chips, for example, with their electrical connections facing down as opposed to a previous extensively used technique of making electrical connections by, for example, wire bond techniques to package (e.g. chip) pins which are pointed upward, in what might be referred to as an inverted package.
Extensive studies have shown that solder ball connection (SBC) arrays, although highly reliable, have certain dimensional and distance limitations which are a factor of the maximum distance that a solder ball can be located from what is usually referred to as a neutral point or point of zero stress on an area array for a chip without threat of rupture or stress fracture. Such chips usually have a footprint which comprises an array of uniformly spaced solder balls in a substantially rectangular and preferably symmetrical square pattern or layout.
Most any connecting system for electrically joining microminiature devices with system components typically has a mismatch of materials between, for example, a chip, a module and/or a circuit board, which mismatch produces mechanical stress in the electrical connection joints. The differences in the coefficients of thermal expansion between the material, for example, silicon of the circuit chip, the material, for example, ceramic used for the module substrate and the epoxy/glass circuit card to which the module mounts, through the use of the solder balls, are significant. Those mechanical stresses including those stresses generated by shock which can occur merely from a device being dropped, have been widely studied and it is generally recognized that there are limitations as to the maximum number of solder balls, as a factor of their size in combination with their spacing, which can be incorporated so as to have satisfactory reliability and continued continuity for the established electrical connections.
Other factors which affect the configuration and the quantity of the incorporated solder balls involves the materials that are used in making either the solder balls and the material which with the solder ball mates or connects on either the chip or the module.
Another utilized technique to increase the reliability of the neutral point distance is to epoxy the chip or module to the board. As the chip or module stresses due to heat expansion the stress is transferred or dissipated through the epoxy or glue to the board or card. This is an expansive technique which does not provide for rework of the card if there is component failure.